Silicon Labs /EFR32ZG23B011F512IM40 /LFXO_S /CFG

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Interpret as CFG

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (AGC)AGC 0 (HIGHAMPL)HIGHAMPL 0 (XTAL)MODE 0 (CYCLES2)TIMEOUT

TIMEOUT=CYCLES2, MODE=XTAL

Description

Do not write to this register unless the oscillator is forced off. The oscillator is forced off if DISONDEMAND is set and FORCEEN is cleared.

Fields

AGC

LFXO AGC Enable

HIGHAMPL

LFXO High Amplitude Enable

MODE

LFXO Mode

0 (XTAL): A 32768Hz crystal should be connected to the LF crystal pads. Voltage must not exceed VDDIO.

1 (BUFEXTCLK): An external sine source with minimum amplitude 100mv (zero-to-peak) and maximum amplitude 500mV (zero-to-peak) should be connected in series with LFXTAL_I pin. Minimum voltage should be larger than ground and maximum voltage smaller than VDDIO. The sine source does not need to be ac coupled externally as it is ac couples inside LFXO. LFXTAL_O is free to be used as a general purpose GPIO.

2 (DIGEXTCLK): An external 32KHz CMOS clock should be provided on LFXTAL_I. LFXTAL_O is free to be used as a general purpose GPIO.

TIMEOUT

LFXO Start-up Delay

0 (CYCLES2): Timeout period of 2 cycles

1 (CYCLES256): Timeout period of 256 cycles

2 (CYCLES1K): Timeout period of 1024 cycles

3 (CYCLES2K): Timeout period of 2048 cycles

4 (CYCLES4K): Timeout period of 4096 cycles

5 (CYCLES8K): Timeout period of 8192 cycles

6 (CYCLES16K): Timeout period of 16384 cycles

7 (CYCLES32K): Timeout period of 32768 cycles

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